English Version

赵怿龙

教育经历

上海交通大学 (SJTU) 2022.9 - 2026.6（预计）

上海, 中国

上海交通大学 (SJTU) 2018.9 - 2021.3

上海, 中国

上海交通大学(SJTU) 2014.9 - 2018.6

上海, 中国

论文 （完整列表见这里）

一作论文

  1. Yilong Zhao, Fangxin Liu, Yiwei Hu, Zongwu Wang, Mingyu Gao, Onur Mutlu, He Xian, Hanlin Dong, Naifeng Jing, Xiaoyao Liang, Haibing Guan, Qiang Xu, Chixiao Chen, Shuxue Quan, Tao Yang, and Li Jiang, GUMPIM: Unitary and Malleable Memory for Processing-in-Memory with Guaranteed PIM Pages, in ACM Transaction of Architecture and Code Optimization (TACO, Accepted)

  2. Yilong Zhao ^, Fangxin Liu ^, Onur Mutlu, Mingyu Gao, Jian Liu, Haibing Guan, and Li Jiang, COSM: A Cooperative Scheduling Framework for Concurrent PIM and CPU Execution on Mobile Devices, in Proceedings of the 53st International Symposium on Computer Architecture (ISCA’26, Best Paper Candidate, ^ Joint first authors)

  3. Yilong Zhao, Fangxin Liu, Zongwu Wang, Mingjian Li, Mingxing Zhang, Chixiao Chen, and Li Jiang, BLADE: Boosting LLM Decoding’s Communication Efficiency in DRAM-based PIM, in Proceedings of the 31st Asia and South Pacific Design Automation Conference (ASP-DAC’26)

  4. Yilong Zhao, Fangxin Liu, Xiaoyao Liang, Mingyu Gao, Naifeng Jing, Chengyang Gu, Qidong Tang, Tao Yang, and Li Jiang, STAMP: Accelerating Second-order DNN Training Via ReRAM-based Processing-in-Memory Architecture, in Proceedings of the 16th International Symposium on Advanced Parallel Processing Technology (APPT’25)

  5. Yilong Zhao, Mingyu Gao, Huanchen Zhang, Fangxin Liu, Gongye Chen, He Xian, Haibing Guan, and Li Jiang, PUSHtap: PIM-based In-Memory HTAP with Unified Data Storage Format, in Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3 (ASPLOS’25)

  6. Yilong Zhao, Mingyu Gao, Fangxin Liu, Yiwei Hu, Zongwu Wang, Han Lin, Ji Li, He Xian, Hanlin Dong, Tao Yang, Naifeng Jing, Xiaoyao Liang, and Li Jiang, UM-PIM: DRAM-based PIM with Uniform & Shared Memory Space, in Proceedings of the 51st International Symposium on Computer Architecture (ISCA’24)

  7. Yilong Zhao, Li Jiang, Mingyu Gao, Naifeng Jing, Chengyang Gu, Qidong Tang, Fangxin Liu, Tao Yang, and Xiaoyao Liang, RePAST: A ReRAM-based PIM Accelerator for Second-order Training of DNN, arXiv preprint 2022

  8. Weidong Cao, Yilong Zhao(共一), Adith Boloor, Yinhe Han, Xuan Zhang, and Li Jiang, Neural-PIM: Efficient Processing-In-Memory with Neural Approximation of Peripherals, in IEEE Transactions on Computers (TC), 2021

  9. Yilong Zhao, Zhezhi He, Naifeng Jing, Xiaoyao Liang, and Li Jiang. 2021. Re2PIM: A Reconfigurable ReRAM-Based PIM Design for Variable-Sized Vector-Matrix Multiplication. In Proceedings of the 2021 on Great Lakes Symposium on VLSI (GLSVLSI ‘21)

其他论文

  1. Haomin Li, Fangxin Liu, Zongwu Wang, Ning Yang, Shiyuan Huang, Yilong Zhao, Chenyang Guan, Jian Liu, Xinran Liang, Li Jiang, and Haibing Guan, Look Once, Compute Less: A Spatio-Temporal Redundancy-Aware CIM Accelerator for Adaptive BEV Representation, in Proceedings of 2026 International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES’26)

  2. Fangxin Liu, Jingkui Yang, Yilong Zhao, Haomin Li, Wen Mei, Xinran Liang, Li Jiang, and Haibing Guan, MOSAIC: Exploiting Structured Tolerance for Adaptive LLM Inference Mapping in Heterogeneous PIM Accelerators, in Proceedings of the 59th IEEE/ACM International Symposium on Microarchitecture (MICRO’26)

  3. Yiwei Hu, Fangxin Liu, Zongwu Wang, Yilong Zhao, Tao Yang, and Li Jiang, PLAIN: Leveraging High Internal Bandwidth in PIM for Accelerating Large Language Model Inference via Mixed-Precision Quantization, in Proceedings of 2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD’25)

  4. Tao Yang, Hui Ma, Yilong Zhao, Fangxin Liu, Zhezhi He, Xiaoli Sun, and Li Jiang, PIMPR: PIM-based Personalized Recommendation with Heterogeneous Memory Hierarchy, in 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE’23)

  5. Tao Yang, Fei Ma, Xiaoling Li, Fangxin Liu, Yilong Zhao, Zhezhi He, and Li Jiang, DTATrans: Leveraging dynamic token-based quantization with accuracy compensation mechanism for efficient transformer architecture, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022

  6. Tao Yang, Dongyue Li, Fei Ma, Zhuoran Song, Yilong Zhao, Jiaxi Zhang, Fangxin Liu, and Li Jiang, Pasgcn: An reram-based pim design for gcn with adaptively sparsified graphs, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022

  7. Fangxin Liu, Wenbo Zhao, Zongwu Wang, Yilong Zhao, Tao Yang, Yiran Chen, and Li Jiang, IVQ: In-memory acceleration of DNN inference exploiting varied quantization, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022

  8. Tao Yang, Dongyue Li, Yibo Han, Yilong Zhao, Fangxin Liu, Xiaoyao Liang, Zhezhi He, and Li Jiang, PIMGCN: A ReRAM-Based PIM Design for Graph Convolutional Network Acceleration, in 2021 58th ACM/IEEE Design Automation Conference (DAC’21)

  9. Fangxin Liu, Wenbo Zhao, Zhezhi He, Zongwu Wang, Yilong Zhao, Yiran Chen, and Li Jiang, Bit-transformer: Transforming bit-level sparsity into higher preformance in ReRAM-based accelerator, in 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD’21)

  10. Fangxin Liu, Wenbo Zhao, Zhezhi He, Zongwu Wang, Yilong Zhao, Tao Yang, Jingnai Feng, Xiaoyao Liang, and Li Jiang SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out Bit Sparsity of Neural Network, in 2021 IEEE 39th International Conference on Computer Design (ICCD’21)

  11. Ziqi Meng, Weikang Qian, Yilong Zhao, Yanan Sun, Rui Yang, and Li Jiang, Digital Offset for RRAM-based Neuromorphic Computing: A Novel Solution to Conquer Cycle-to-cycle Variation, in 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE’21)

  12. Yanan Sun, Chang Ma, Zhi Li, Yilong Zhao, Jiachen Jiang, Weikang Qian, Rui Yang, Zhezhi He and Li Jiang, Unary Coding and Variation-Aware Optimal Mapping Scheme for Reliable ReRAM-based Neuromorphic Computing, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2021

  13. Zhuoran Song, Yilong Zhao, Yanan Sun, Xiaoyao Liang and Li Jiang. ESNreram: An Energy-Efficient Sparse Neural Network Based on Resistive Random-Access Memory. Proceedings of the 2020 on Great Lakes Symposium on VLSI (GLSVLSI’20)

  14. Chaoqun Chu, Yanzhi Wang, Yilong Zhao, Xiaolong Ma, Shaokai Ye, Yunyan Hong, Xiaoyao Liang, Yinhe Han and Li Jiang. PIM-Prune: Fine-Grain DCNN pruning for Crossbar-based Process-In-Memory architecture. ACM/IEEE Design Automation Conference (DAC’20)

  15. Jia Wang, Yilong Zhao, Xin Huang and Guangqiang He. High Speed Polarization-Division Multiplexing Transmissions Based on the Nonlinear Fourier Transform, ZTE COMMUNICATIONS 17, 3 (2019).

  16. Aiguo Sheng, Yilong Zhao, and Guangqiang He, Characterization of Kerr Solitons in Microresonators with Parameter Optimization and Nonlinear Fourier Spectrum, in Conference on Lasers and Electro-Optics, OSA Technical Digest (Optical Society of America, 2019), paper JW2A.47.

  17. Aiguo Sheng, Yilong Zhao, and Guangqiang He, Quadratic soliton combs in doubly resonant half-harmonic generation, in Nonlinear Optics (NLO), OSA Technical Digest (Optical Society of America, 2019), paper NTu4A.18.

专利

  1. 刘方鑫, 蒋力, 赵怿龙，“大语言模型的解码加速方法、系统、设备及可读存储介质”。 发明专利，申请号：2025118583915.5

  2. 蒋力，赵怿龙，“可重构架构、加速器、电路部署和计算数据流方法”。发明专利，申请号：202010910280.5；授权号：CN112181895B

  3. 蒋力，赵怿龙，崔晓松，陈云，廖健行，“神经网络电路”。发明专利，申请号：202010729402.05；公开号：CN114004344A

获奖

  1. Student Travel Grant, International Symposium on Advanced Parallel Processing Technology (APPT), 2025

  2. 2025年度 优秀实习生，上海期智研究院

项目经历

上海期智研究院

华为合作项目 –面向光通信、无线通信的的存算一体实现– 2021.03-2022.06

研究目的是基于存算一体技术实现光通信与无线通信的接收机，负责工作如下：

上海羿煜电子科技有限公司

实习 2020.07-2021.07

使用Candance为电路设计版图并验证。

上海交通大学, 先进计算机体系结构实验室

蒋力 研究员指导

华为合作项目 –基于ReRAM的高效可靠DNN加速器技术研究– 2019.4 - 2020.4

项目研究基于ReRAM的DNN加速器中，提升计算可靠性以及利用稀疏性提升能效，负责工作如下：

上海交通大学，量子非线性光子学实验室

何广强 教授指导

研究 –光频梳的产生与演化条件的研究– 2018.3 - 2018.6

中兴合作项目 –基于硅基微纳谐振腔的量子纠缠光频梳产生及传输问题研究– 2017.6 - 2018.3

项目研究利用非线性频域编码以解决长距离传输过程中光信号的演化衰变问题，负责工作如下：

利思电器

实习 2016.07 - 2016.08

上海交通大学，大学生创新计划

赵春宇教授指导

利思合作项目 –带蓝牙接口的DTU的开发– 2015.12 - 2016.12

定制一个数据转发单元（DTU）电路与数据分析显示程序，负责工作如下：

助教

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Last updated: 2026.04